IBIS Macromodel Task Group Meeting date: 23 August 2022 Members (asterisk for those attending): Achronix Semiconductor: Hansel Dsilva Amazon: John Yan ANSYS: * Curtis Clark * Wei-hsing Huang Cadence Design Systems: Ambrish Varma Jared James Google: * Hanfeng Wang * GaWon Kim Intel: Michael Mirmak * Kinger Cai * Chi-te Chen Alaeddin Aydiner Keysight Technologies: Fangyi Rao Majid Ahadi Dolatsara Ming Yan Radek Biernacki Rui Yang Luminous Computing David Banas Marvell Steve Parker Mathworks (SiSoft): * Walter Katz Mike LaBonte Micron Technology: * Randy Wolff Justin Butterfield Missouri S&T Chulsoon Hwang Rivos * Yansheng Wang SAE ITC Michael McNair Siemens EDA (Mentor): * Arpad Muranyi Teraspeed Labs: * Bob Ross Waymo: * Zhiping Yang Zuken USA: * Lance Wang The meeting was led by Arpad Muranyi. Curtis Clark took the minutes. -------------------------------------------------------------------------------- Opens: - None. ------------- Review of ARs: - None. -------------------------- Call for patent disclosure: - None. ------------------------- Review of Meeting Minutes: Arpad asked for any comments or corrections to the minutes of the August 16th meeting. Curtis moved to approve the minutes. Zhiping seconded the motion. There were no objections. -------------- New Discussion: PI Modeling in IBIS: Zhiping presented an update on work exploring modeling power diodes in IBIS. He shared a data sheet from a power diode component, and he said one goal was to capture important data sheet parameters in the IBIS model. He said the primary focus was on capturing characteristic information, for example, the I/V curve from the data sheet. Zhiping shared an example IBIS file, which created a [Component] to define the diode. In response to a notation by Zhiping in the example asking whether the [Series Switch Groups] keyword was necessary for a diode, Arpad stated that it is not a required keyword and not necessary for the diode example. Zhiping asked whether we needed a new [Model] type, for example "diode", or whether existing Series model types would be sufficient. He suggested that a new "diode" type might be a more accurate indication of what was being modeled. Arpad and Bob noted that Series types provided series and parallel combinations of R, L, C values, or single I/V tables using Series_Current, or I/V tables for different control voltages using Series_MOSFET. Zhiping showed his example, in which a parallel C was useful in conjunction with a Series_Current keyword. Arpad said we might need a parallel combination of several of these Series model types to get I/V characteristics along with parallel C elements, for example, which is possible via [Series Pin Mapping] as parallel models can be defined between the same pair of pins. Zhiping said we could start with something simple, and Arpad agreed but said we need to look toward the future to make sure we don't box ourselves in with the first version. Bob noted that Series Current models are two terminal devices that support the concept of a polarity, so they have some flexibility in terms of supporting a diode model. Zhiping wondered whether Series Current was primarily used for passive devices right now, and he asked whether a new model type clearly indicating to the EDA tool that this is an active element might help. Arpad said this was a good start, and he asked whether Zhiping's group was concerned about the response time of the diode. He said that if we only provide static I/V data, then we don't have information about turn-on and turn-off behavior. Timing characteristics could introduce power or efficiency losses, etc. Zhiping agreed that we could add some additional information from the data sheet's turn-on tables, for instance. He said the plan was to start with a relatively simple proposal, but we could add more detail as necessary. Arpad agreed that the requirements depend upon what aspects of the VRM need to be simulated. Kinger said one diode characteristic is a threshold voltage, for example .7V, above which it starts conducting. He asked whether this would be a useful parameter to include in the IBIS model. Arpad and Bob said this turn-on behavior could be captured directly in the I/V tables. Arpad asked whether Zhiping would want to include strongly negative bias voltages in his [Series Current] table. Would breakdown effects be important to include? Zhiping said that typically the user would keep it operating in the safe region, and he did not anticipate needing breakdown information. He thought his table down to -1200V would be sufficient in this case. Bob said breakdown voltage testing might be outside of IBIS models' capabilities. Arpad agreed that if we're talking about VRM modeling we probably don't need to worry about it. However, he noted that in TVS (transient voltage suppressor) diodes the Zener diode operates in the breakdown region. Zhiping agreed that breakdown information would be useful for ESD simulations too. Zhiping said that IBIS had started with a focus on I/O models and SI simulation. He said this new proposal could help with discrete packaged component models for PI related simulations. Inductor Modeling: Hanfeng presented an update on a related proposal to model inductors. He reviewed an example IBIS file and an online data sheet. He said the most important things to capture would be the DC R parasitics and the current derating behavior (L changes as a function of the current through the inductor). Arpad asked whether this was due to core saturation effects, and Hanfeng said it was. Hanfeng said Series elements could be used to model the DC R, but the saturation effects were probably something Series elements couldn't model. Arpad agreed. Hanfeng suggested we might need a new "inductor" or "power inductor" Model type. He said this was relatively straight forward compared to the diode. Kinger suggested that we should also include temperature derating of the L. Hanfeng agreed that if we create a new Model type, we can also add a table for temperature derating of the L, as it is also included in the data sheets. Kinger said these effects are critical. Arpad asked whether he was referring to the maximum allowed current based on I2R resistive heating in the device, or whether there's a separate derating of L according to temperature. Hanfeng said they could investigate this further, if we decide to pursue the proposal and create an inductor model. Arpad said that data sheet parameters were a good start, but we might need to go beyond data sheet values. Data sheet information might be overly simplified to protect intellectual property or simplify things for customers. Zhiping noted an IBIS Summit presentation on inductor modeling from Yamajian Yan and Stephen Ellsworth on August 28, 2020: https://urldefense.proofpoint.com/v2/url?u=http-3A__ibis.org_summits_aug20_yan.pdf&d=DwIGAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=DcQR-qLpQg5lIreuM6-NYECRIAFXt268PRNS5WO043M&m=ogCQlRsS0RZX0n7GuRGvH2BCyBdeC41fwPBcTK0BpK3yddg7Rg2SZ72Vlw-7v4QF&s=HgQwvRQZbuTtf3nhgEhodc2HyedD3-hE2vnZnQi7bXQ&e= Arpad asked about the expected usage model for the power simulations envisioned by Zhiping and Hanfeng. He said he was still concerned about the widely varying time scales between an I/O buffer switching at GHz (ps steps) vs. kHz or lower frequencies for VRM modeling. He asked whether the goal was to support pure VRM simulations or some sort of SI/PI cosimulation. Zhiping said that power issues exist everywhere, and his goal is to enable any power simulations that people are interested in performing. He would like SI/PI cosimulation for people who need it, for example, DDR simulations. He would also like to support pure power simulations, including those that might get into power distribution on core and PSIJ (power supply induced jitter) that could affect I/O. He would also like to support pure power simulations for board PDN design verification. Hanfeng said today's presentations were more along the lines of VRM related simulation and providing the core power rail. He said PSIJ simulations would probably be supported by higher frequency simulations that would not have to concern themselves with lower frequency VRM simulations. Kinger said that traditionally, besides SI, we talked about power delivery. Recently, however, the terminology for power modeling has become more granular. We now have: power delivery - below 1MHz - VRM, MOSFET, bulk caps, etc. power integrity - above 1MHz to 10s or 100s and even GHz that impacts jitter. Kinger said Zhiping and Hanfeng's talks today were focused on the power delivery portion up to about 1MHz. Arpad asked about future plans. Zhiping and Hanfeng said they would continue their research on modeling these devices. Based on any feedback they received, they would go through at least one more round of discussions with ATM prior to considering a formal BIRD proposal. - Curtis: Motion to adjourn. - Zhiping: Second. - Arpad: Thank you all for joining. AR: Zhiping to send his presentation and Hanfeng's to the ATM list. ------------- Next meeting: 30 August 2022 12:00pm PT ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives